View AT78C1505_5261043.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 features ? operating supply range 3.0v to 3.6v ? power dissipation 200mw max ? low-power sleep mode < 0.5mw ? four high-speed, low noise 3.1k w w w w , 4.15k w w w w or 11.7k w w w w transimpedance (tz) amplifiers ? programmable voltage amplifiers following fast tz amps (0.5, 0.7, 1 and 2 v/v) ? dedicated differential rf output ? flexible output configuration for fast quad signals ? photodetector signal current up to 30 m m m m a per photodiode allowed (read mode), 4.15k w w w w transimpedance, pgc = 1 v/v ? gain reduction on all transimpedance amplifiers during write mode (expanded input range 10x) ? separate write mode and id mode pins for fast switching between write and read, and id and read ? transimpedance amplifiers for ef and laser power monitor (3x gain of high-speed amplifiers) ? programmable offset dacs for fast/slow-transimpedance amplifiers ? serial register for programming offset and gains ? ideal for use with atmels at78c1503 dvd/cd read channel and at78c1502 dvd/cd dsp servo chip description atmels AT78C1505 contains the necessary preamplifiers for dvd or cd front-end read electronics. the AT78C1505 is a dvd/cd preamp responsible for amplification of slow/fast photodetector signals for cd-rom, dvd-rom or dvd-ram data. the preamp also includes an additional single-ended transimpedance amplifier with programmable gain and offset adjustment which can be used for laser power monitor. the cmos preamplifier operates from a single 3.3v supply and is fully programmable through a serial interface for either cd or dvd modes. 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 nc a gnda b gndb c gndc d gndd nc nc vdd2 ap an vddb bp bn vddc cp cn vddd dp dn nc 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 vss2 e f lpwr eo fo lpwro write idsel sdata sclk sena nc vdd3 vss3 vddtpp tppp tppn vddrf1 rfp rfn vddrf2 vss vdda AT78C1505 dvd/cd read preamplifier AT78C1505 preliminary rev. 1215aC11/98
AT78C1505 2 block diagram pgc vref a 2 sden sdclk sdata serial register transz amp r tz -a b transz amp r tz -a c transz amp r tz -a d transz amp r tz -a rfp rfn programmable outputs a or a + c b or a + b c or c + d d or b + d 2 2 2 e transz amp 3r tz _ + vref f transz amp 3r tz _ + offset dac 7 vref 1.2v lpwr transz amp 3r tz _ + vref lpwro write - - - - gain dac 4 - offset dac 7 - gain dac 4 - offset dac 7 - gain dac 4 - gain reduction for all transz amps ap an bp bn cp cn dp dn eout fout offset d ac tppp tppn rtz user selectable: 3.7k, 4.15k or 14.15k write mode rtz = 500 w (a + d) - (b + c) offset dac offset dac offset dac idsel note* *rfp/n are the total fast diode sum (a + b + c + d) when idsel is low. when idsel is high rfp/n output is right channel minus the left channel (a+d) - (b+c). to other circuitry 2x 2x 2x 2x 1x note** a + c is referred to as diagonal 1 (dia1) ** b + d is referred to as diagonal 2 (dia2) a + b is referred to as the right channel (rch) c + d is referred to as the left channel (lch) (a + d) - (b + c) is referred to as the tangential push pull (tpp) signal (i.e. this is the front minus pgc pgc pgc configuration select output the back of the array).
AT78C1505 3 functional description abcd high-speed transimpedance amplifiers the AT78C1505 contains four transimpedance amplifiers for high-speed amplification of dvd/cd readback signals. an application diagram for each input is shown below. photodetector and fast transimpedance amplifier each transimpedance (tz) stage is implemented as a shunt feedback amplifier with a selectable feedback resistor and additional programmable gain for flexible single ended input current to differential output voltage conversion. the following tables show tz gains and pgc selection. in addition to the coarse gain adjustment given above, a fine transimpedance gain trim exists. this is a 15% trim which applies to the overall gain independent of tz and pgc settings. this can be set using gaintrm<1:0> via reg 0 and is set according to the following table. offset dacs are provided to compensate for the dc component of the photodiode currents. each input channel a, b, c and d has an offset dac. the offset is introduced after the transimpedance amplifier but before the programable gain amplifier. this implies the offset correction is scaled with pgc setting but not transimpedance setting. each channel offset correction affects the channels respective output in addition to the rf and tpp outputs. the rf/tpp outputs have 1/2 the gain of the a, b, c and d outputs, thus the offsets appear as 1/2 the value at the rf/tpp outputs when compared to the a, b, c and d outputs. offsets on channel a input are nulled by observing channel a output and choosing the appropriate dac value such that zero volts differential results (ap - an = 0). this also applies to channels b, c and d. six bits are provided for offset adjustment with one lsb equal to -1.26mv on rf/tpp channels and -2.52mv on a, b, c, and d channels (due to the factor of two difference in the gains of these outputs). with 6 bits this translates into a maximum of -80.6mv and -161.2mv correction on rf/tpp and a/b/c/d outputs respectively. offset correction is negative in order to compensate for positive input current offsets and the pgc amplifier is set to a gain of 1v/v for the above correction values. table 1. high-speed tz gain selection tz<1> tz<0> tz gain 0 0 3.1k 014.15k 1012.7k 110.45k table 2. high-speed pgc gain selection pgc<1> pgc<0> pgc v/v 00 0.5 01 0.7 10 1.0 11 2.0 pgc a transz amp r tz -a a i 3 to 15v offset table 3. overall trim setting gaintrm<1> gaintrm<0> overall trim v/v 0 0 85% 0 1 100% 1 0 100% 1 1 115%
AT78C1505 4 write mode is also provided, via the write pin, which reduces the internal feedback resistor to 450 w . input current noise is less than 6pa/rthz over the passband of the amplifier. six differential outputs are provided and can be configured in one of two ways. the output configuration is done via the serial register (see reg1, bit 4). one of the six outputs is the sum of the abcd inputs and is referred to as the rf output. this output represents the readback data which is processed by the following read channel. the rf output must be ac coupled to the subsequent circuitry. the rf output also is used to read id data for dvd-ram. in this mode the outputs are configured as (a + b) - (c + d). this alternate output configuration is selected by asserting the idsel pin high. four of the remaining five outputs can be configured as a, b, c and d outputs or as a + c, b + d, a + d and b + c. each of the channels has an extra gain of 2 compared to the rf and tpp outputs. the partial sum outputs a + c and b + d can be used for differential phase detection tracking in the following read channel (dvd) as well as astigmatic focus, while a + b and c + d can be used for push-pull tracking, wobble detection and id detection in the subsequent read channel. each differential output has a low-impedance driver to drive the flex and read channel circuitry. the sixth differential output is the signal (a + d) - (b + c). this signal is used for the tangential push pull (tpp) operation. ef and lpwr slow-speed servo amps the ef amps are used to process servo information such as 3-beam tracking for cd. each photodetector input drives a low-bandwidth (1mhz) transimpedance amplifier as shown below. photodetector and slow-transimpedance amplifier each amplifier also has a dedicated 6-bit offset dac controllable though the serial register. input/output bias level for zero input current is set at 1.2v. tables for tz gain and pgc are given below. the maximum allowable current is 30 m a per diode under normal read operating conditions (16.2k w tz, 1 v/v pgc). the outputs of these preamplifiers are all single ended. 3 to 15v e transz amp 3r tz _ + offset dac 6 1.2v pgc table 4. servo tz gain tzef<1> tzef<0> tz gain 0 0 11.8k 0 1 16.2k 1046k 111.4k table 5. servo pgc gains pgcef<1> pgcef<0> pgc gain v/v 000.5 011 102 114 table 6. offset setting output offset voltage pgc 1v/v (scales with pgc) min 0 max -182mv
AT78C1505 5 photodetector array the AT78C1505 read preamp operates on the photo detector array. other detector arrays are possible and can be used in conjunction with the prescribed preamp. photodiode array the following table shows the possible output combinations for the AT78C1505. e f d a c b track direction table 7. output signal photo-diode combination rf a + b + c + d id a + b - c - d dia1 or a a + c or a dia2 or d b + d or d rch or b a + b or b lch or c c + d or c eo e fo f lpwr lpwrout
AT78C1505 6 notes: 1. all bits active high unless otherwise noted. 2. all dacs linear unless otherwise noted. serial register map register bit(s) description 0 0 sleep, power down chip 1:2 gaintrm<1:0> 3:5 bgtrm<2:0> 6:7 not used 1 1:0 tz<1:0> high-speed transimpedance gains 3:2 pgc<1:0> high-speed voltage gains 4 outconfig, selects a, b, c and d as outputs if = 0 selects a + c, b + d,a + b and c + d as outputs if = 1 7:5 not used 2 5:0 aoff<6:0>, offset correction for ia input 3 5:0 boff<6:0>, offset correction for ib input 4 5:0 coff<6:0>, offset correction for ic input 5 5:0 doff<6:0>, offset correction for id input 6 1:0 tzef<1:0> 3:2 pgcef<1:0> 5:4 tzlpwr<1:0> 7:6 pgclpwr<1:0> 7 5:0 eoff<6:0> offset for slow-transimpedance e 8 5:0 foff<6:0> offset for slow-transimpedance f 9 5:0 lpwroff<6:0> offset for slow-transimpedance lpwr 10 7:0 not used 11 7:0 not used
AT78C1505 7 electrical characteristics operating conditions: v dd = 3.0v to 3.6v and t a = 0 to 70 c. supply specifications parameter sym conditions min typ max units supply voltage v dd 3.0 3.3 3.6 v supply current i dd 30 ma sleep mode current i dds 100 m a digital input/output (cmos compatible) parameter sym conditions min typ max units high-level input voltage v ih v dd - 0.5 v low-level input voltage v il 0.5 v high/low-level input current 10 m a high-level output voltage v oh i oh = 0.5ma v dd - 0.2 v low-level output voltage v ol i ol = 0.5ma 0.4 abcd high-speed transconductance amplifier parameter sym conditions min typ max units transimpedance gain k1 single ended current input: differential voltage output per channel 4.15k programmable k w w w w programmable gain control (pgc) g1 0.5, 0.7, 1 and 2 v/v programmable -10% +10% input current dynamic range idr input current per channel 2% linearity 4.15k w tz 1v/v pgc 30 m a output voltage dynamic range vdr abcd summation, rf output, peak to peak differential voltage 600 mvppd bandwidth tzbw -3 db 70 mhz input dc bias voltage vidc zero input current 600 800 1200 mv output bias voltage vodc any high-speed channel vdd-1.75 v output offset voltage voff any high-speed channel -150 150 mv dac output offset step rf channel output vdaco lsb of six bit dac 1.26 mv input resistance rin 10 mhz measurement 200 w w w w input capacitance cin 10 mhz measurement 4 pf input current noise ino 20 mhz bw measurement 6 pa/rthz channel to channel rejection ratio ccrr 25 db power supply rejection ratio psrr vsupply = 250mv @10 mhz 25 db
AT78C1505 8 ef servo and laser power monitor transconductance amplifiers parameter sym conditions min typ max units transimpedance gain k1 single ended current input: differential voltage output per channel 16.2k programmable k w input current dynamic range servo idrs input current per channel 2% linearity 14.15k w tz 1v/v pgc 30 m a output voltage dynamic range servo vdrs normal operating conditions 1 v bandwidth tzbw -3db 1 mhz input dc bias voltage vidc zero input current bgtrm (100) centered 1.2 v output bias voltage vodc zero input current common mode measurement 1.2 v dac output offset step vdaco lsb of six bit dac 3.4 mv input resistance rin 0.5 mhz measurement 500 w w w w input capacitance cin 0.5 mhz measurement 4 pf input current noise ino 4pa/rthz output voltage noise vno 1 mhz bw measurement 100 nv/rthz channel to channel rejection ratio ccrr 25 db power supply rejection ratio psrr vsup = 250mv @ 0.5 mhz 25 db serial register parameter sym conditions min typ max units serial clock frequency sclk 0.01 20 mhz sena to sclk setup time tec transition time serial enable to serial clock 10 ns sclk pulse width tpw 40 ns sclk to sdata hold time thcd 20 ns sdata to sclk setup time tsdc 20 ns a6 sclk pulse width tturn 40n ns duty cycle of sclk full rate 25 mhz only applies for high program rates 40 60 %
AT78C1505 9 serial port timing diagram sena sclk rnwa0a1 a2a3 a4 a5 a6 d0 d1 d2 d3 d4 d5 d6 d7 sdata tec tpw tturn
AT78C1505 10 ordering information ordering code package operation range AT78C1505-48tc 48 pin tqfp commercial (0 c to 70 c) package type 48t 48-lead thin quad flat pack (tqfp)
AT78C1505 11 packaging information .354(9.0)bsc .276(7.0)bsc .007(0.17) .011(0.27) .354(9.0)bsc .267(7.0)bsc .063(1.60) max .053(1.35) .057(1.45) .0196 (0.5) bsc .018(0.45) .030(0.75) .002(0.05) .006(0.15) 0-7? 48t , 48-lead thin quad flat pack (tqfp) dimensions in inches and (millimeters).
? atmel corporation 1998. atmel corporation makes no warranty for the use of its products, other than those expressly contained in the companys standard war- ranty which is detailed in atmels terms and conditions located on the companys website. the company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any tim e without notice, and does not make any commitment to update the information contained herein. no licenses to patents or other intellectu al prop- erty of atmel are granted by the company in connection with the sale of atmel products, expressly or by implication. atmels pr oducts are not authorized for use as critical components in life support devices or systems. marks bearing ? and/or ? are registered trademarks and trademarks of atmel corporation. terms and product names in this document may be trademarks of others. atmel headquarters atmel operations corporate headquarters 2325 orchard parkway san jose, ca 95131 tel (408) 441-0311 fax (408) 487-2600 europe atmel u.k., ltd. coliseum business centre riverside way camberley, surrey gu15 3yl england tel (44) 1276-686677 fax (44) 1276-686697 asia atmel asia, ltd. room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon, hong kong tel (852) 27219778 fax (852) 27221369 japan atmel japan k.k. tonetsu shinkawa bldg., 9f 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel (81) 3-3523-3551 fax (81) 3-3523-7581 atmel colorado springs 1150 e. cheyenne mtn. blvd. colorado springs, co 80906 tel (719) 576-3300 fax (719) 540-1759 atmel rousset zone industrielle 13106 rousset cedex, france tel (33) 4 42 53 60 00 fax (33) 4 42 53 60 01 fax-on-demand north america: 1-(800) 292-8635 international: 1-(408) 441-0732 e-mail literature@atmel.com web site http://www.atmel.com bbs 1-(408) 436-4309 printed on recycled paper. rev. 1215aC11/98

▲Up To Search▲

Price & Availability of AT78C1505

	To Download AT78C1505 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .